The present invention relates to RF power combining. and more particularly to combining the power of several microwave high power FET amplifiers using baluns.
A balun is a two port circuit which efficiently transforms an unbalanced (with respect to ground) transmission mode, such as coax or microstrip, to a balanced mode such as twin-lead or twin strip. The primary requirement of the balun is that two terminals in the balanced port be 180.degree. apart in phase and equal in amplitude. Baluns can be formed using several different methods.
Microwave solid state high power amplifiers and monolithic microwave integrated circuits (MMICs) is a very fast-developing area of technology. Applications for these components range from communications satellite transmitters to military radars, communications and SDI. FETs are currently limited to an output power in the range of a few watts, mainly due to the rapid decrease of input impedance as total gate width is increased. As the input impedance is reduced, greater matching circuit losses are incurred with the resultant decrease in gain and power-added efficiency. Additionally, the bandwidth over which the FETs can be matched is reduced.
FIG. 1 shows a conventional parallel-cell device in which FET cells 10A, 10B, 10C and 10D are connected in parallel. FIG. 1 is described using a numerical example in which it is assumed that each of these four FET cells has an input impedance of 5 .OMEGA. (ohms) and an output impedance of 25 .OMEGA.. The parallel-cell device shown in FIG. 1 would thus have an input impedance of: ##EQU1## and an output impedance of: ##EQU2## Similarly, if a parallel-cell device such as the one shown in FIG. 1 were used to combine eight FET cells, and each individual FET cell had an input impedance of 5 ohms and an output impedance of 25 ohms, the input impedance and output impedance of the device would be 0.625 .OMEGA. and 3.125 .OMEGA., respectively. Thus, it is difficult to achieve a high output power and to impedance match both the input and output of a conventional parallel-cell device such as the one shown in FIG. 1.
Several methods have been employed to combine the power of a plurality of FETs and overcome the problems associated with the parallel-cell device shown in FIG. 1. For example, on the chip level, each FET could be partially matched using either lumped or distributed elements and combined in clusters so that the impedance level could not drop too low and eventually would increase to the system impedance (e.g., 50 .OMEGA.). The disadvantages of this approach in solving the problem are that there is a high RF loss and it usually requires a large size. Another approach is to match each FET to 50 .OMEGA. on the amplifier level and to combine the individual amplifiers using microwave networks (i.e., Wilkinson combiners, quadrature couplers, or radial combiners). This solution is disadvantageous, however, in that the required area is large and total combining losses can be high.